Some semiconductor devices contain lateral extended drain n-channel metal oxide semiconductor (LDNMOS) transistors. The LDNMOS transistor has a lateral n-type drain drift region under a p-type RESURF layer. When the LDNMOS transistor is in an off state, a depletion region at the pn junction between the RESURF layer and the drain drift region extends into the drain drift region. When the LDNMOS transistor is switched to an on state, the depletion region inhibits current through the drain drift region, undesirably causing an increase in the on-state resistance of the LDNMOS transistor. The depletion region diminishes over a few milliseconds as charge is collected in the RESURF layer to form an equilibrium state with the drain drift region in the on state. The increased on-state resistance immediately after switching to the on state disadvantageously dissipates power in the LDNMOS transistor and reduces an efficiency of a switching circuit using the LDNMOS transistor.